1. Field of the Invention
This invention relates generally to data processing systems and more particularly to the instruction buffer which provides instruction for the central processing unit.
2. Description of the Prior Art
With the development of the large data processing systems, there has been a continuing effort to increase the throughput of the central processing system without raising the costs to an unacceptable level. One of the methods of increasing the throughput has been to utilize a cache memory. The cache memory provides a high-speed memory of generally limited capacity which can be physically located near the central processing unit. The cache memory provides the data for which the central processing unit has an immediate requirement.
In addition to the cache memory unit, the high-performance data processing unit typically has an instruction buffer. The instruction buffer provides a small memory to which the control unit of the central processing unit has direct access. The instruction buffer stores the data groups representing instructions just prior to entry of the data groups into the central processing unit.
However, even with the cache memory and the instruction buffer, the performance of the data processing system can be compromised by the transfer from one instruction sequence to a second instruction sequence of the instructions controlling the operation of the central processing unit. To complicate the situation, the transfer of instruction sequences can be conditioned on some event not capable of pre-identification prior to some data manipulations. Thus, it is not possible even upon identification of a transfer instruction to insure that the transfer to the second instruction sequence defined in the transfer instruction is required by the data processing system.
It is therefore, an object of the present invention to provide an improved data processing system.
It is a further object of the present invention to provide apparatus for an improved instruction buffer associated with a central processing unit in a data processing system.
It is a more particular object of the present invention to permit the transfer from one instruction sequence to a second instruction sequence with minimum interruption of the operation of a data processing unit.
It is yet another object of the present invention to provide an instruction buffer containing both a first instruction sequence and a second instruction sequence for use by a data processing system.
It is still another object of the present invention to provide the apparatus for storing a first and a second instruction sequence and apparatus for signalling the status of the storing apparatus.